ARM Cortex-M3 主频可至64MHz
256 Kbytes 内置 Flash
48 Kbytes 静态 SRAM

The SRAM is accessible over System Cortex-M3 bus at address 0x2000 0000

16 Kbytes ROM( UART, USB驱动和在线应用升级IAP)

1. Serial Wire/JTAG Debug Port(SWJ-DP)
Serial Wire Debug Port (SW-DP) and Serial Wire JTAG Debug Port (SWJ-DP) debug access.

  1. 访问所有的内存和系统的寄存器
    当内核处于 运行,挂起,或者 reset暂停 状态时,寄存器都可以访问
  2. Flash Patch and Breakpoint (FPB) unit for implementing breakpoints and code patches.
  3. Data Watchpoint and Trace (DWT) unit for implementing watchpoints, data tracing, and system profiling.
  4. Instrumentation Trace Macrocell (ITM) for support of printf style debugging.
  5. IEEE1149.1 JTAG Boundary-scan on all digital pins.


  1. 实现升级程序时, 此时Flash被擦除或者写入,不能执行代码
  2. 调试功能是,代码下载到SRAM中更快,且不会频繁写FLASH,造成Flash过快损耗。


These are the steps needed to get the whole application placed in RAM, and to get it to run as expected in RAM.

Get data (read/write and constant) and code linked to be placed in RAM.
Place the Vector Table in RAM (with at least the alignment forced by the Cortex-M design.)
During C-start-up, set VTOR to the address of the Vector Table.


Place CODE and DATA in RAM.

Use the “edit”-button (or change directory in your .icf file) at Project > Options > Linker > Config to open the window “Linker configuration file editor”

Go to the tab “memory regions” – copy the value in RAM/start and paste that value in ROM/start – then copy the value in RAM/end and paste it as ROM/end.
修改内存, 把RAM 当成 ROM用


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